1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor layer including diffusion and channel regions formed on an insulating layer.
2. Description of the Related Art
One example of such a semiconductor device is a silicon-on-insulator (SOI) device with metal-oxide-semiconductor field-effect transistors (MOSFETs). The SOI structure enables the MOSFETs to operate at high speeds with low power consumption. Compared with the MOSFETs in a semiconductor device having a conventional silicon substrate, the MOSFETs in an SOI device operate faster because they have less junction capacitance, consume less power because their driving voltage can be reduced, and also consume less power because less current leaks through them in the off state.
It is known that further improvements in MOSFET performance can be achieved by reducing the thickness of the silicon semiconductor active layer in an SOI device, thereby enabling the active layer to be fully depleted, improving the MOSFET subthreshold characteristics, and preventing short-channel effects.
The silicon active layer, however, acts as an etch stop film when the interlayer dielectric film above it is etched to form contact holes. If the thickness of the active layer is excessively reduced, some contact holes may penetrate through the active layer and the insulating layer therebelow. The electrodes formed in these contact holes may then create undesired electrical paths (short circuits) between the active layer and the substrate below the insulating layer.
Two Japanese unexamined patent application publications disclose structures that address this problem. A first structure, disclosed in FIG. 5 of publication No. 7-74126 (1995) places an etch stop film above the active layer. A second structure, disclosed in FIG. 18 of publication No. 2000-133709, forms an etch stop film covering the entire insulating layer.
With the first structure, however, inaccurately aligned contact holes may still penetrate through the insulating layer where it is not covered by the active layer, allowing electrodes to come into contact with the supporting substrate. Accordingly, this structure is inapplicable to highly integrated semiconductor devices in which MOSFETs are densely laid out and alignment tolerances are tight.
With the second structure, the characteristics of the MOSFETs are seriously degraded. The insulating layer is a silicon dioxide (SiO2) layer, and the etch stop film is a silicon nitride (Si3N4) film. As is well known, a non-SiO2 insulating film, such as an Si3N4 film, forms many silicon-insulator interface levels. In this structure, since the etch stop film is present below the MOSFET channel region, many undesired interface levels are present in the channel region.